1. Field
Embodiments relate to a nonvolatile memory device, and more particularly, to a nonvolatile memory device using interleaving technology and a programming method thereof.
2. Description of the Related Art
Single-level cell (SLC) memory stores data of one bit in a single memory cell. SLC memory is also referred to as single-bit cell (SBC) memory. Data of one bit is written to and read from SLC memory by a voltage belonging to one of two distributions distinguished by a threshold voltage programmed to a memory cell.
Programmed threshold voltages form a distribution in a predetermined range due to a minute electrical characteristic difference between single level cells. For instance, when a voltage read from a memory cell is 0.5 to 1.5 volts it may be determined that data stored in the memory cell has a logic value of “1”. When a voltage read from a memory cell is 2.5 to 3.5 volts, it may be determined that data stored in the memory cell has a logic value of “0”.
Data stored in a memory cell is classified depending on the difference between memory cell currents/voltages during a read operation. Meanwhile, multi-level cell (MLC) memory that stores data of two or more bits in a single memory cell has been proposed in response to a need for higher integration of memory. MLC memory may also be referred to as a multi-bit cell (MBC) memory.
However, as the number of bits stored in a single memory cell increases, reliability may deteriorate and the read-failure rate may increase. To program “m” bits in a single memory cell, 2m distributions may be required to be formed. However, since the voltage window of a memory may be limited, the difference in a threshold voltage between adjacent bits may decrease as “m” increases, which may increase the read failure rate.
For instance, as for multi-level flash memory, the number of errors at the end of life (EOL) is influenced a lot by the arrangement of threshold voltage states after programming operations. When m-bit multi-level flash memory is programmed using a gray code, the number of read operations for each page increases exponentially by a power of 2, that is, 1, 2, 4, 8 and so on. The difference in the number of read operations between pages may cause a bit error rate (BER) to be different from page to page.
Approaches for adjusting a verify-read voltage have been proposed to equalize a BER for all pages at the EOL in order to guarantee the reliability. However, it is difficult to adjust the verify-read voltage so that every page has the same BER at the EOL. It is more difficult as the number of threshold voltage states increases.